1. Field of the Invention
The present invention relates to a voltage up converter, and more particularly to, a voltage up converter which can improve voltage up efficiency.
2. Discussion of Related Art
In general, a voltage up converter generates a power voltage having a higher internal power level than that of an external power, by using the external power. Hereinafter, the external power is referred to as VDD and the internal power is referred to as VPP.
The VDD itself has a high power level. Therefore, a doubler (pump for generating a power twice as high as the external power) can generate a high internal power. For example, the doubler can generate 3V of VPP voltage level by using 2.5V of VDD.
However, as the external power is gradually lowered, the doubler is not able to generate a high internal power. Here, a tripler (pump for generating a power three times as high as the external power) has been suggested. For example, the tripler can generate 3.5V of internal power by using 1.5V of external power.
FIG. 1 is a block diagram illustrating a conventional voltage up converter using a tripler. The operation of the conventional voltage up converter of FIG. 1 will now be explained with reference to FIG. 2.
A detector 10 detects a VPP potential, and outputs a start signal start when the VPP potential is lower than a specific potential. An oscillator 20 is operated according to the start signal start, for generating a signal osc having a constant period as shown in FIG. 2. A controller 30 is operated according to the output signal osc from the oscillator 20, for generating first and second control signals control1 and control2 as shown in FIG. 2. A pump 40 generates a VPP power according to the first and second control signals control1 and control2. FIG. 3 is a detailed circuit diagram illustrating the pump 40. The operation of the pump 40 will now be explained with reference to FIG. 3.
When an external control signal t1 is enabled in a high level, a transistor TR0 of a first pump 40a is turned on, and a boot node boot is charged by a VDD power. The external control signal t1 is disabled in a low level, and the first control signal control1 is enabled at the rising edge of the output signal osc from the oscillator 20. Accordingly, the first pump 40a is operated. That is, the first control signal control1 is applied to a capacitor C1 of the first pump 40a, and thus a potential of the boot node boot becomes 2×VDD, which is higher than the external power.
When an external control signal t2 is enabled in a high level, a transistor TR1 of the first pump 40a is turned on, and charges of the boot node boot are transmitted to a pump node pump of a second pump 40b. 
The external control signal t2 is disabled in a low level, and the second control signal control2 is enabled at the falling edge of the output signal osc from the oscillator 20. Therefore, the second pump 40b is operated. That is, the second control signal control2 is applied to a capacitor C2 of the second pump 40b, and thus a potential of the pump node pump becomes ‘potential of the pump node+VDD’. The maximum potential which can be pumped by the second pump 40b becomes 3×VDD.
When an external control signal t3 is enabled in a high level, a transistor TR2 is turned on, and the VPP power increases by charge sharing between the pump node pump and the VPP power.
Thereafter, the external control signal t3 is disabled.
The VPP power gradually increases by repeating the above pumping operation. When the VPP power reaches a target level, the start signal start is disabled to stop the pumping operation.
However, after the operation of the first pump 40a controlled by the first control signal control1, the level of the boot node boot of the first pump 40a tends to be continuously lowered after the rising edge of the first control signal control1. The boot node boot of the first pump 40a boosted by the first control control1 is one node of the capacitor C1, and the potential of the boot node boot is gradually lowered due to variations of an environment and a leakage current of the capacitor C1. In addition, charge sharing between the boot node boot and the pump node pump is not charge sharing using normal complete charges. That is, a smaller amount of charges than a pumping amount are supplied to the pump node pump due to the leakage current.
As described above, dropping of the boot node boot by the leakage current and the variations of the environment reduce efficiency of the tripler. The dropping of the boot node boot is more serious when the oscillator 20 has a long period. It is because the dropping of the boot node boot occurs for half a period of the oscillator 20.
In the general output signal osc from the oscillator 20, a low width (LW of FIG. 2) and a high width (HW of FIG. 2) are identical in one period. As a result, the output signal osc from the oscillator 20 having such a time width reduces efficiency of the tripler.